You write custom CUDA kernels to replace PyTorch operators for speedups.
Implement Range-Gate Affine on x[B,D]: Compute z = x*scale + bias, then per-row g = sigmoid(gamma*(max(z)-min(z)) + beta), output y = z * g. Use one CUDA block per row, reduce max and min with warp shuffles, and apply the scalar gate across the row in the same kernel. Provide a PyTorch reference with nn.Parameter scale, bias, gamma, beta. Accuracy rtol=1e-3.
